1. Field of the Invention
The present invention relates to the formation of a shallow trench isolation structure in semiconductor wafer fabrication. More particularly, the present invention relates to the formation of a shallow trench isolation structure for laser thermal processing.
2. Description of the Related Art
Semiconductor wafer fabrication involves a series of processes used to create semiconductor devices and integrated circuits (ICs) in and on a semiconductor wafer surface. Fabrication typically involves the basic operations of layering and patterning, together with others such as doping, and heat treatments. Layering is an operation used to add thin layers of material (typically insulator, semi-conductor or conductor) to the surface of the semiconductor wafer. Layers are typically either grown (for example, thermal oxidation of silicon to grow a silicon dioxide dielectric layer) or deposited by a variety of techniques such as chemical vapor deposition (CVD) and physical vapor deposition (PVD), including evaporation and sputtering. Patterning, is an operation that is used to remove specific portions of the top layer or layers on the wafer surface. Patterning is usually accomplished through the use of photolithography (also known as photomasking) to transfer the semiconductor design to the wafer surface.
Patterning is often used to expose an area to be etched, such as to create a trench for creation of an isolation structure. More particularly, isolation structures are often created, for instance, to separate different devices from one another, as well as to separate source and drain regions within a particular semiconductor device.
Semiconductor device sizes have decreased dramatically over the years. In order to accommodate sub-micron IC feature sizes, various technologies have been developed and applied. Since IC feature sizes are small, shallow junctions are used, for example, to create source and drain regions.
In order to create a shallow junction, rapid thermal annealing processes are commonly used. Recently, laser thermal processing became available in semiconductor manufacturing. During laser annealing, the silicon substrate material is subjected to laser light emitted from a laser source. Depending upon the wavelength and fluence of the photons, the photons penetrate the surface of the substrate material and dissipate their energy within the substrate surface layer, resulting in heat generation. Depending on the application, the wavelength and energy can be chosen to partially or fully melt the substrate surface layer. During the cooling period, dopants residing in the substrate are recrystallized at substitutional lattice sites and are therefore electrically activated.
During the fabrication of shallow junctions, the isolation structures are also exposed to the laser source. The isolation material of choice for current technologies is silicon dioxide. More particularly, either Shallow Trench Isolation (STI) or Local oxidation of Silicon (LOCOS) silicon dioxide is used to separate adjacent devices. Since silicon dioxide is transparent to laser light, it cannot be used as a blocking layer during laser thermal processing. Rather, the light is reflected only when the thickness of the silicon dioxide layer is a multiple of the wavelength of the laser light. Due to the fact that the isolation structure is transparent, the silicon substrate underneath the isolation may be melted by the laser light and cause a short of adjacent device wells.
In addition to the damage to the device underlying the isolation, there is also a possibility of damage to device structures overlying the isolation. For instance, a polysilicon gate overlying the isolation will generate heat during the laser annealing process. This heat will generally remain within the polysilicon gate, melting the polysilicon gate and effecting the operation of the resulting chip.
In view of the above, what is needed are methods and compositions for defining an isolation structure which prevents the melting of device structures as well as the silicon substrate underneath the isolation structure for use in conjunction with laser thermal processing during semiconductor fabrication.
The present invention provides methods and apparatus for forming an isolation structure on an integrated circuit substrate. This is accomplished through providing a two-layer isolation structure in which the upper layer enables laser light to be transferred to the lower layer, which absorbs heat generated during laser thermal processing. In this manner, the isolation structure is advantageously designed to avoid melting of device structures as well as the integrated circuit substrate during laser thermal processing.
In accordance with one embodiment, an isolation structure is formed on an integrated circuit substrate. A trench is etched in the trench such that the light barrier layer at least partially fills the trench to create a light barrier structure. The light barrier layer is adapted for absorbing laser light applied during laser thermal processing, thereby preventing damage to the integrated circuit substrate. For instance, the light barrier layer may be a conductive layer such as polysilicon. A dielectric layer is then formed over the light barrier structure. The dielectric layer may be adapted for transferring heat generated by the laser thermal processing to the light barrier structure. For instance, the dielectric layer may be formed through oxidation of a top surface of the light barrier layer or light barrier structure.
In accordance with another embodiment, an isolation structure formed on an integrated circuit substrate includes a trench and a light barrier layer in the trench forming a light barrier structure. The light barrier structure is adapted for absorbing laser light applied during laser thermal processing, thereby preventing damage to the integrated circuit substrate. A dielectric layer is then formed over the light barrier structure. The dielectric layer may be adapted for transferring heat generated by the laser thermal processing to the light barrier layer. Since the dielectric layer may be formed through oxidation of a top surface of the light barrier structure, a nitrogen rich barrier layer may be provided as a trench liner to prevent damage to sidewalls of the isolation structure during the oxidation process and further consumption of the sidewalls of the silicon substrate.
These and other features and advantages of the present invention are described below with reference to the drawings.